registers.inc

Macros

CR0

CR0_PEProtected Mode Enable
CR0_MPMonitor co-processor
CR0_EMx87 FPU Emulation
CR0_TSTask switched
CR0_ETExtension type
CR0_NENumeric error
CR0_WPWrite protect
CR0_AMAlignment mask
CR0_NWNot-write through
CR0_CDCache disable
CR0_PGPaging

CR3

CR3_PWTPage-level Write-Through
CR3_PCDPage-level Cache Disable

CR4

CR4_VMEVirtual 8086 Mode Extensions
CR4_PVIProtected-mode Virtual Interrupts
CR4_TSDTime Stamp Disable
CR4_DEDebugging Extensions
CR4_PSEPage Size Extension
CR4_PAEPhysical Address Extension
CR4_MCEMachine Check Exception
CR4_PGEPage Global Enabled
CR4_PCEPerformance-Monitoring Counter enable
CR4_OSFXSROperating system support for FXSAVE and FXRSTOR instructions
CR4_OSXMMEXCPTOperating System Support for Unmasked SIMD Floating-Point Excepions
CR4_UMIPUser-Mode Instruction Prevention
CR4_VMXEVirtual Machine Extensions Enable
CR4_SMXESafer Mode Extensions Enable CR4_FSGSBASE -
CR4_PCIDEPCID Enable
CR4_OSXSSAVEXSAVE and Processor Extended States Enable
CR4_SMEPSupervisor Mode Execution Protection Enable
CR4_SMAPSupervisor Mode Access Prevention Enable
CR4_PKEProtection Key Enable
CR4_CETControl-flow Enforcement Technology
CR4_PKSEnable Protection Keys for Supervisor-Mode Pages
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